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Most efficient utilization of electrical energy takes place when energy is consumed locally, avoiding its distribution over long distances or costly storage technologies. Finding such applications for renewable energy sources, like wind or solar, is difficult. The main obstacle is the their limited predictability and the mismatch between energy availability and demand. Nowadays the daytime lighting...
As a result of a growing interest in the xTCA systems by research centers conducting High Energy Physics (HEP) experiments, the PICMG xTCA for Physics Coordinating Committee is developing a new, attractive standards. They are specifically dedicated to control and data acquisition systems of HEP applications. These new specifications define a number of extensions to the Advanced Telecommunications...
Equation-defined non-linear functional elements are important building blocks in the development of compact semiconductor device models. Current trends in compact device modelling suggest widespread acceptance among the modeling community of Verilog-A, for semiconductor device specification, model exchange and circuit simulation. This paper outlines techniques for the development of adaptive EPFL-EKV...
Within the framework of Keldysh impact ionization model the calculation of effective threshold energy for silicon MOSFET with 100 nm channel length by means of ensemble Monte-Carlo simulation is performed. The possibility of impact ionization rate treatment with one-parameter Keldysh model in pre-breakdown and breakdown transistor operation mode using calculated effective threshold energy value is...
The Verilog-A "Analogue Device Model Synthesizer" (ADMS) has in recent years become an established modelling tool for GNU General Public License circuit simulator development. Qucs and ngspice are two examples of open source circuit simulators that employ ADMS for compact semiconductor model construction. This paper presents a "turn- key" compact device modelling and circuit macromodelling...
This paper presents an algorithm, based on the fixed point iteration, to solve for sizes and biases using transistor compact models such as BSIM3v3, BSIM4, PSP and EKV. The proposed algorithm simplifies the implementation of sizing and biasing operators. Sizing and biasing operators were originally proposed in the hierarchical sizing and biasing methodology [1]. They allow to compute transistors sizes...
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